# Hands On: Design of a Phase Lead Network for a DC Motor Model

#### Summary

The typical problem under consideration concerns the teaching of the design of phase lead (lag) control networks by using basic tools of the Control System Toolbox, as well as the derivation of transfer function and state-space models from a physical model of a real system. It is known that the design of control networks can be performed using empirical approaches or semi-automated methodologies. To this aim, the synthesis of a phase lead or lag network can be easily achieved from the required response transient time or phase margin performances, by means of the use of the root locus or Bode diagram, and through the analysis of proper frequency function.

Through this design example, it is shown that a 'learning by doing approach', which enhances the development of theoretical and practical issues proposed to the student at the same time, should support the teaching activity. On the other hand, the use of 'real or realistic examples' taken from different engineering backgrounds helps to engage students and attract their interest towards difficult theoretical activities. Moreover, the design of proper 'manual and semi-automated procedures' that are tailored to the considered application examples drives the students to learn the engineering approach to solve practical problems.

## Learning Goals

The main goal of the course consists of providing the basics to tackle the study of complex digital systems and of their interconnections under proper design constrains imposed by cost, speed, computational cost, robustness, reliability and power consumption.

The main acquired knowledge will be:

- Basic elements of a digital system form a dynamic point of view, considering the information from its sampled data input to its sampled data output;

- Knowledge related to the analysis of discrete-time dynamic systems in steady and transient states and their simulation tools;

- Basic knowledge of a D/A (Digital to Analog) and A/D (Analog to Digital) blocks;

- Basic knowledge to tackle the study of complex digital systems and of their interconnections under the constrains imposed by performances in terms of cost, speed, computational cost, robustness and power consumption.

- Basic knowledge of the mathematical tools for the analysis of the discrete-time and sampled data dynamic systems;

- Basic knowledge of dynamic system software simulation tools.

The basic acquired skills (that are the capacity of applying the acquired knowledge) will be:

- Analysis of the behaviour of discrete time digital systems in steady and dynamic conditions;

- Design of the discrete time dynamic controller for a given system in order to meet proper transient and steady state constraints;

- Identification of the most suitable A/D and D/C elements, as well as the most suitable sampling time for a specific control design and its application;

- Use of simulation numerical programs to analyse digital systems.

## Context for Use

The following concepts and the knowledge provided by the courses of "Fundamentals of Automatic Control" or "Automatic Control" are mandatory:

- Basic concepts of mathematics, differential and integral computation;

- Knowledge of the basic concepts of Physics;

- Knowledge of dynamic systems, their behaviour, and their practical application; methods to analyse dynamic systems in steady and transient states:

- Knowledge of the frequency tools for the analysis of dynamic systems;

- Ability to analyse and design analog systems.

In particular, this lab activity is suitable for both BSc and MSc undergraduate students of an Information Science Engineering curriculum, which can contain basic and elective courses of Automatic Control. It would require no more than 2 hours. This activity requires the knowledge of basics of Automatic Control. The basic use of Matlab and Simulink would be required. The size of the class can vary from 30 to 90 students, depending on the capability of the computer laboratory.

## Description and Teaching Materials

Hands On Design of a Phase Lead Network for a DC Motor Model (Acrobat (PDF) 219kB Jul27 19)

## Teaching Notes and Tips

s = tf('s');

Gs = ... % Definition of the controlled process

[numGs,denGs] = tfdata(Gs,'v'); % definition of the transfer function of the controlled process

Rs = (s/10 + 1)/(s/150 + 1); % definition of the control network

[numRs,denRs] = tfdata(Rs,'v'); % Simulink vectors

Ga = Rs * Gs; % close loop gain transfer function

rlocus(Ga) % Root locus

sgrid % Locus of the points with constant delta

K = rlocfind(Ga) % Gain corresponding to the required delta

lsiminfo(yc,t) % Validates the required transient time requirements

## Assessment

The learning assessement is based on an exam that aims at verifying at which level the learning objectives previously described have been acquired.

This examination is usually divided into 2 sections that take place in the same day.

The first stage of the assessement consists of a project regarding the simulation and the control design for a simple digital system by using the Matlab and Simulink environments, which aims at understanding if the student has the skills in the analysis and the synthesis of a digital system. To pass this test it is required to get at least 18 points out of 24. The time allowed for this test is 1 hour. It is allowed consulting the Matlab and Simulink program and user's manual.

The second stage consists of a test (multiple choice questions or solutions of numeric exercises) based on all the topics tackled in the class or on the basic concepts of the following courses: "Digital Control System", with the aim of evaluating how deeply the student has studied the subject and how he is able to understand the basic topics analysed. To pass this test it is required to get at least 1 points out of 7. The time allowed for this test is 1 hour. It is not allowed consulting any textbook or using any PC, smart phone, calculator....

The final mark is the sum of the 2 marks. To pass the exam it is necessary to get at least 18 point out of 31. If the first test fails or if the final mark is below 18, it is necessary to repeat all the exam's sections.

Passing the whole exam is proof of having acquired the ability to apply knowledge and the required skills defined in the course training objectives.

Before the essessement, the students may perform a self-evaluation of their reached levels by solving the following design examples.

Self-evaluation-design-examples.pdf (Acrobat (PDF) 23kB Nov8 19)

The students can verify and compare the achieved performances with the solutions proposed in the following.

Solutions_to_Self-evaluation-design-examples.pdf (Acrobat (PDF) 274kB Nov8 19)

## References and Resources

http://www.unife.it/ing/informazione/scd/scheda-insegnamento-2/en?year=2019

http://www.silviosimani.it/lessons25.html

http://ctms.engin.umich.edu/CTMS/index.php?aux=Extras_Leadlag